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MM912F634CV2AP Datasheet(PDF) 182 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 182 Page - Freescale Semiconductor, Inc |
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182 / 335 page ![]() Functional Description and Application Information Memory Mapping Control (S12SMMCV1) MM912F634 Freescale Semiconductor 182 In single-chip modes accesses by the CPU (except for firmware commands) to any of the unimplemented areas (see Figure 44) will result in an illegal access reset (system reset). BDM accesses to the unimplemented areas are allowed but the data will be undefined. No misaligned word access from the BDM module will occur; these accesses are blocked in the BDM module (Refer to BDM Block Guide). Table 247. Global Implemented Memory Space Internal Resource Bottom Address Top Address Registers 0x0_0000 0x0_03FF IFR (if MMCCTL1.IFRON == 1’b1) 0x0_0400 0x0_047F Unimplemented (if MMCCTL1.IFRON == 1’b0) Unimplemented 0x0_0480 0x0_07FF RAM 0x0_0800 RAM_HIGH = 0x0_07FF plus RAMSIZE(162) FLASH FLASH_LOW = 0x4_0000 minus FLASHSIZE(163) 0x3_FFFF Note: 162. RAMSIZE is the hexadecimal value of RAM SIZE in bytes. 163. FLASHSIZE is the hexadecimal value of FLASH SIZE in bytes. |
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