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MM912F634CV2AP Datasheet(PDF) 178 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 178 Page - Freescale Semiconductor, Inc |
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178 / 335 page ![]() Functional Description and Application Information Memory Mapping Control (S12SMMCV1) MM912F634 Freescale Semiconductor 178 4.28.2.2.3 Mode Register (MODE) Read: Anytime. Write: Only if a transition is allowed (see Figure 51). The MODC bit of the MODE register is used to establish the MCU operating mode. Figure 51. Mode Transition Diagram when MCU is Unsecured Table 244. Mode Register (MODE) Address: 0x0032 7 6 5 432 10 R MODC 0 000 00 0 W Reset MODC(161) 0 000 00 0 Note: 161. External signal (see Table 239). Table 245. MODE Field Descriptions Field Description 7 MODC Mode Select Bit — This bit controls the current operating mode during RESET high (inactive). The external mode pin MODC determines the operating mode during RESET low (active). The state of the pin is registered into the respective register bit after the RESET signal goes inactive (see Figure 51). Write restrictions exist to disallow transitions between certain modes. Figure 51 illustrates all allowed mode changes. Attempting non authorized transitions will not change the MODE bit, but it will block further writes to the register bit except in special modes. Changes of operating modes are not allowed when the device is secured, but it will block further writes to the register bit except in special modes. Normal Single-Chip 1 Special Single-Chip 0 RESET (SS) 0 RESET 1 (NS) RESET Transition done by external pins (MODC) Transition done by write access to the MODE register 1 |
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