MM912F634CV2AP datasheet(176/335 Pages) FREESCALE

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Functional Description and Application Information

Memory Mapping Control (S12SMMCV1)

MM912F634

Freescale Semiconductor

176

Global map) within the 64 kByte Local map. The PPAGE index register is effectively used to construct paged Flash addresses in

the Local map format. The CPU has special access to read and write this register directly, during execution of CALL and RTC

instructions.

Figure 49. PPAGE Address Mapping

The fixed 16 k page from 0x0000 to 0x3FFF is the page number 0xFC. Parts of this page are covered by Register and RAM

space. See SoC Guide for details.

The fixed 16 k page from 0x4000–0x7FFF is the page number 0xFD.

The reset value of 0xFE ensures that there is linear Flash space available between addresses 0x0000 and 0xFFFF out of reset.

The fixed 16 k page from 0xC000-0xFFFF is the page number 0xFF.

4.28.2.2.2

Direct Page Register (DIRECT)

Read: Anytime

Write: anytime in special modes, one time only in other modes.

This register determines the position of the 256 Byte direct page within the memory map.It is valid for both global and local

mapping scheme.

Table 241. PPAGE Field Descriptions

Field

Description

3–0

PIX[3:0]

Program Page Index Bits 3–0

— These page index bits are used to select which of the 256 FLASH or ROM array pages is

to be accessed in the Program Page Window.

Table 242. Direct Register (DIRECT)

Address: 0x0031

432

DP15

DP14

DP13

DP12

DP11

DP10

DP9

DP8

Reset

000

Bit14

Bit0

Address [13:0]

PPAGE Register [3:0]

Global Address [17:0]

Bit13

Bit17

Address: CPU Local Address

or BDM Local Address

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