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MM912F634CV2AP Datasheet(PDF) 135 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 135 Page - Freescale Semiconductor, Inc |
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135 / 335 page  Functional Description and Application Information Basic Timer Module - TIM (TIM16B4C) MM912F634 Freescale Semiconductor 135 Table 182. Timer Input Capture/Output Compare Register 1(TC1) Offset(122) 0xD0, 0xD1 Access: User read(anytime)/write (special mode) 15 14 13 12 11 10 9 8 R tc1_15 tc1_14 tc1_13 tc1_12 tc1_11 tc1_10 tc1_9 tc1_8 W Reset 0 000 00 00 76 543 210 R tc1_7 tc1_6 tc1_5 tc1_4 tc1_3 tc1_2 tc1_1 tc1_0 W Reset 0 000 00 00 Note: 122. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 183. Timer Input Capture/Output Compare Register 2(TC2) Offset(123) 0xD2, 0xD3 Access: User read(anytime)/write (special mode) 15 14 13 12 11 10 9 8 R tc2_15 tc2_14 tc2_13 tc2_12 tc2_11 tc2_10 tc2_9 tc2_8 W Reset 0 000 00 00 76 543 210 R tc2_7 tc2_6 tc2_5 tc2_4 tc2_3 tc2_2 tc2_1 tc2_0 W Reset 0 000 00 00 Note: 123. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 184. Timer Input Capture/Output Compare Register 3(TC3) Offset(124) 0xD4, 0xD5 Access: User read(anytime)/write (special mode) 15 14 13 12 11 10 9 8 R tc3_15 tc3_14 tc3_13 tc3_12 tc3_11 tc3_10 tc3_9 tc3_8 W Reset 0 000 00 00 76 543 210 R tc3_7 tc3_6 tc3_5 tc3_4 tc3_3 tc3_2 tc3_1 tc3_0 W Reset 0 000 00 00 Note: 124. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 185. TCn - Register Field Descriptions Field Description 15-0 tcn[15-0] 16 Timer Input Capture/Output Compare Registers |
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