BQ76PL455APFCT datasheet(104/125 Pages) TI1

104 / 125 page

VINn

* VOUTn

AOCn

VINn

* VOUTn *

- ç ÷

104

bq76PL455A

SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016

www.ti.com

Product Folder Links: bq76PL455A

Submit Documentation Feedback

Application Information (continued)

Although the bq76PL455A does not provide AUX gain error correction, the host microcontroller can perform the

required correction using the slope value calculated as part of the GEC for the VSENSE channels. The

procedure can use the value stored in VSGAIN or a different value stored separately in one of the SCRATCH

registers of the bq76PL455A. If the procedure uses a value stored in the bq76PL455A, this permits the value to

follow the device in distributed systems. Optionally, the microcontroller memory can store the value. Because

gain error corrections are primarily correcting for VREF errors, a single-gain error correction for the AUX

channels is sufficient.

AUX Offset Error Correction: –39.06 mV to 38.99 mV in 1023 steps (10 bits) in registers AX0OFFSET through

AX7OFFSET, one 16-bit register per AUX input channel.

Procedure: (use m from the VSENSE Gain Error Correction procedure, or recalculate separately using any AUX

channel, as desired)

1. Apply voltage VINn, read back from ADC VOUTn, where 'n' is the AUX channel number. Record both values.

2. Find the AUX offset correction (AOC). This is the same formula used for the VSENSE offset correction

(OEC,) but a larger adjustment range is possible.

(16)

NOTE

The final AOC should be a 10-bit 2's-complement value in the range –512 to +511 after

discarding the upper 6-bits of the 16-bit value. Values exceeding this are suspect and

probably indicate an error. If such a value must be used, the resulting 10-bit value should

be saturated (–512 or +511) and sign corrected as necessary.

3. Write the 10-bit value to the 16-b AXnOFFSET register, where n is the AUX channel number.

4. Repeat steps 1–3 for each AUX channel 0–7.

5. Save the new values to EEPROM by setting DEV_CTRL[WRITE_EEPROM], after setting the appropriate

values for MAGIC1 and MAGIC2. The EEPROM checksum will also require re-calculation and saving due to

this (or any) change.

8.1.4 Device Addressing

8.1.4.1 Using a Stored Address

As part of the reset process, the EEPROM restores the value in ADDR. If DEVCONFIG[ADDR_SEL] ==0, this

value is overridden by the value sampled from the GPIOs.

8.1.4.2 GPIO Addressing

When DEVCONFIG[ADDR_SEL] ==0, the device uses the address sampled from GPIO[4:0] to set ADDR. The

address is sampled as part of the reset process or by setting DEV_CTRL[AUTO_ADDRESS].

8.1.4.3 Auto Addressing

Prior to using the Auto-Addressing function in a stack, all devices must be awake and ready for communication.

The steps necessary for this state are detailed elsewhere in this document, but typically require a few

milliseconds per device.

Very simple stacks consisting of a single device may use address 0x00 (or any other valid address) for the

device. The first device in stacks of more than one device may also use Address 0x00.

BQ76PL455APFCT Datasheet(PDF) 104 Page - Texas Instruments

BQ76PL455APFCT Datasheet(HTML) 104 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL