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MM912F634CV2AP Datasheet(PDF) 122 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 122 Page - Freescale Semiconductor, Inc |
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122 / 335 page  Functional Description and Application Information General Purpose I/O - PTB[0…2] MM912F634 Freescale Semiconductor 122 4.17.4 Register definition 4.17.4.1 Port B Configuration Register 1 (PTBC1) NOTE The pull-up resistor is not active once the port is configured as an output. 4.17.4.2 Port B Configuration Register 2 (PTBC2) Table 145. Port B Configuration Register 1 (PTBC1) Offset(101) 0x20 Access: User read/write 76 543 210 R0 PUEB2 PUEB1 PUEB0 0 DDRB2 DDRB1 DDRB0 W Reset 0 000 00 00 Note: 101. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 146. PTBC1 - Register Field Descriptions Field Description 6-4 PUEB[2-0] Pull-up Enable Port B[2…0] 0 - Pull-up disabled on PTBx pin. 1- Pull-up enabled on PTBx pin. 2-0 DDRB[2-0] Data Direction Port B[2….0] 0 - PTBx configured as input. 1 - PTBx configured as output. Table 147. Port B Configuration Register 2 (PTBC2) Offset(102) 0x21 Access: User read/write 76 543 210 R 0 000 PWMCS PWMEN SERMOD W Reset 0 000 00 00 Note: 102. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 148. PTBC2 - Register Field Descriptions Field Description 3 PWMCS PWM Channel Select PTB2. See Section 4.13, “PWM Control Module (PWM8B2C)". 0 - PWM Channel 0 selected as PWM Channel for PTB2 1 - PWM Channel 1 selected as PWM Channel for PTB2 2 PWMEN PWM Enable for PTB2. See Section 4.13, “PWM Control Module (PWM8B2C)". 0 - PWM disabled on PTB2 1 - PWM enabled on PTB2 (Channel as selected with PWMCS) 1-0 SERMOD Serial Mode Select for PTB0 and PTB1. See Figure 34 for details. 00 - Mode 0, SCI internally connected the LIN Physical Layer Interface. PTB0 and PTB1 are Digital I/Os 01 - Mode 1, SCI connected to PTB0 and PTB1 (external SCI mode) 10 - Mode 2, LIN Physical Layer Interface connected to PTB0 and PTB1 (external LIN mode) 11 - Mode 3, SCI internally connected the LIN Physical Layer Interface and PTB0 and PTB1 are connected both as outputs (Observe mode) |
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