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MM912F634CV2AP Datasheet(PDF) 123 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 123 Page - Freescale Semiconductor, Inc |
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123 / 335 page ![]() Functional Description and Application Information General Purpose I/O - PTB[0…2] MM912F634 Freescale Semiconductor 123 4.17.4.3 Port B Data Register (PTB) Table 149. Port B Data Register (PTB) Offset(103) 0x22 Access: User read/write 76 543 210 R 0 000 0 PTB2 PTB1 PTB0 W Reset 0 000 00 00 Note: 103. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 150. PTB - Register Field Descriptions Field Description 2-0 PTB[2-0] Port B general purpose input/output data — Data Register If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and synchronized pin input state is read. |
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