MM912F634CV2AP datasheet(126/335 Pages) FREESCALE

126 / 335 page

Functional Description and Application Information

Basic Timer Module - TIM (TIM16B4C)

MM912F634

Freescale Semiconductor

126

0xC8

Timer Control Register 1 (TCTL1)

Read/Write

0xC9

Timer Control Register 2 (TCTL2)

Read/Write

0xCA

Timer Interrupt Enable Register (TIE)

Read/Write

0xCB

Timer System Control Register 2 (TSCR2)

Read/Write

0xCC

Main Timer Interrupt Flag 1 (TFLG1)

Read/Write

0xCD

Main Timer Interrupt Flag 2 (TFLG2)

Read/Write

0xCE

Timer Input Capture/Output Compare Register 0 (TC0(hi))

Read/Write(107)

0xCF

Timer Input Capture/Output Compare Register 0 (TC0(lo))

Read/Write(106)

0xD0

Timer Input Capture/Output Compare Register 1 (TC1(hi))

Read/Write(106)

0xD1

Timer Input Capture/Output Compare Register 1 (TC1(lo))

Read/Write(106)

0xD2

Timer Input Capture/Output Compare Register 2 (TC2(hi))

Read/Write(106)

0xD3

Timer Input Capture/Output Compare Register 2 (TC2(lo))

Read/Write(106)

0xD4

Timer Input Capture/Output Compare Register 3 (TC3(hi))

Read/Write(106)

Note:

104. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.

105. Always read $00.

106. Only writable in special modes. (Refer to SOC Guide for different modes).

107. Write to these registers have no meaning or effect during input capture.

Table 151. Module Memory Map (continued)

Offset(104)

Use

Access

MM912F634CV2AP Datasheet(PDF) 126 Page - Freescale Semiconductor, Inc

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