MM912F634CV2AP datasheet(130/335 Pages) FREESCALE

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Functional Description and Application Information

Basic Timer Module - TIM (TIM16B4C)

MM912F634

Freescale Semiconductor

130

4.18.3.3.7

Timer Toggle On Overflow Register 1 (TTOV)

NOTE

TOVn toggles output compare pin on overflow. This feature only takes effect when the

corresponding channel is configured for an output compare mode. When set, an overflow

toggle on the output compare pin takes precedence over forced output compare events.

Table 163. TSCR1 - Register Field Descriptions

Field

Description

TEN

Timer Enable

1 = Enables the timer.

0 = Disables the timer. (Used for reducing power consumption).

TFFCA

Timer Fast Flag Clear All

1 = For TFLG1 register, a read from an input capture or a write to the output compare channel [TC 3:0] causes the

corresponding channel flag, CnF, to be cleared.For TFLG2 register, any access to the TCNT register clears the TOF flag.

Any access to the PACNT registers clears the PAOVF and PAIF bits in the PAFLG register. This has the advantage of

eliminating software overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to

unintended accesses.

0 = Allows the timer flag clearing.

Table 164. Timer Toggle On Overflow Register 1 (TTOV)

Offset(114) 0xC7

Access: User read/write

543

210

000

TOV3

TOV2

TOV1

TOV0

Reset

000

Note:

114. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.

MM912F634CV2AP Datasheet(PDF) 130 Page - Freescale Semiconductor, Inc