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MM912F634CV2AP Datasheet(PDF) 170 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 170 Page - Freescale Semiconductor, Inc |
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170 / 335 page ![]() Functional Description and Application Information Port Integration Module (9S12I32PIMV1) MM912F634 Freescale Semiconductor 170 4.27.3.12 Port A Reduced Drive Register (RDRA) 4.27.3.13 PIM Reserved Registers Table 235. Port A Reduced Drive Register (RDRA) Address 0x0122 Access: User read/write(159) 76 543 210 R 0 0 RDRA5 RDRA4 RDRA3 RDRA2 RDRA1 RDRA0 W Reset 0 000 00 00 Note: 159. Read: Anytime. Write: Anytime. Table 236. RDRA Register Field Descriptions Field Description 5-0 RDRA Port A reduced drive —Select reduced drive for outputs This register configures the drive strength of output pins as either full or reduced. If a pin is used as input this bit has no effect. 1 Reduced drive selected (1/6 of the full drive strength). 0 Full drive strength enabled. Table 237. PIM Reserved Register Address 0x0123-0x017F Access: User read(160) 76 543 210 R 0 0 0 0 0 0 0 0 W Reset 0 000 00 00 Note: 160. Read: Anytime. Write: Unimplemented. Writing to these registers has no effect. |
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