MM912F634CV2AP datasheet(154/335 Pages) FREESCALE

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Functional Description and Application Information

MM912F634 - Analog Die Trimming

MM912F634

Freescale Semiconductor

154

4.25.1.2.4

Trimming Register 3 (CTR3)

2-0

SLPBGTR2…0

bg1p25sleep trim - This trim is used to adjust the internal sleep mode 1.25 V bandgap used as a reference for the VDD and

VDDx over-voltage detection.

000: -12.2% (default)

001: -8.2%

010: -4.2%

011: 0%

100: +4.2%

101: +8.3%

110: +12.5%

111: -12.2% (default)

Table 210. Trimming Register 3 (CTR3)

Offset(140) 0xF3

Access: User read/write

OFFCTRE

OFFCTR2

OFFCTR1

OFFCTR0

CTR3_E

CTR3_2

CTR3_1

CTR3_0

Reset

000

Note:

140. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.

Table 211. CTR3 - Register Field Descriptions

Field

Description

OFFCTRE

ADC offset compensation voltage trim enable bit

0 - no trim can be done

1 - trim can be done by setting OFFCTR[2:0] bits

6-4

OFFCTR2…0

ADCOFFC trim - This trim is used to adjust the internal ADC offset compensation voltage

000: 0%

001: +7.98%

010: +15.97%

011: +23.95%

100: -23.95%

101: -15.97%

110: -7.98%

111: 0%

CTR3_E

Spare Trim enable bit

CTR3_2

Spare Trim bit 2

CTR3_1

Spare Trim bit 1

CTR3_0

Spare Trim bit 0

Table 209. CTR2 - Register Field Descriptions (continued)

Field

Description

MM912F634CV2AP Datasheet(PDF) 154 Page - Freescale Semiconductor, Inc

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