MM912F634CV2AP datasheet(198/335 Pages) FREESCALE

198 / 335 page

Functional Description and Application Information

Background Debug Module (S12SBDMV1)

MM912F634

Freescale Semiconductor

198

4.30.4.1

Security

If the user resets into special single-chip mode with the system secured, a secured mode BDM firmware lookup table is brought

into the map overlapping a portion of the standard BDM firmware lookup table. The secure BDM firmware verifies that the on-chip

EEPROM and Flash EEPROM are erased. This being the case, the UNSEC and ENBDM bit will get set. The BDM program jumps

to the start of the standard BDM firmware and the secured mode BDM firmware is turned off and all BDM commands are allowed.

If the EEPROM or Flash do not verify as erased, the BDM firmware sets the ENBDM bit, without asserting UNSEC, and the

firmware enters a loop. This causes the BDM hardware commands to become enabled, but does not enable the firmware

commands. This allows the BDM hardware to be used to erase the EEPROM and Flash.

BDM operation is not possible in any other mode than special single-chip mode when the device is secured. The device can only

be unsecured via BDM serial interface in special single-chip mode. For more information regarding security, please see the

S12S_9SEC Block Guide.

4.30.4.2

Enabling and Activating BDM

NOTE

If an attempt is made to activate BDM before being enabled, the CPU resumes normal

instruction execution after a brief delay. If BDM is not enabled, any hardware

BACKGROUND commands issued are ignored by the BDM and the CPU is not delayed.

The system must be in active BDM to execute standard BDM firmware commands. BDM can be activated only after being

enabled. BDM is enabled by setting the ENBDM bit in the BDM status (BDMSTS) register. The ENBDM bit is set by writing to the

BDM status (BDMSTS) register, via the single-wire interface, using a hardware command such as WRITE_BD_BYTE.

After being enabled, BDM is activated by one of the following (BDM is enabled and active immediately out of special single-chip

reset):

•

Hardware BACKGROUND command

•

CPU BGND instruction

•

Breakpoint force or tag mechanism (This method is provided by the S12S_DBG module)

When BDM is activated, the CPU finishes executing the current instruction, and then begins executing the firmware in the

standard BDM firmware lookup table. When BDM is activated by a breakpoint, the type of breakpoint used determines if BDM

becomes active before or after execution of the next instruction.

In active BDM, the BDM registers and standard BDM firmware lookup table are mapped to addresses 0x3_FF00 to 0x3_FFFF.

BDM registers are mapped to addresses 0x3_FF00 to 0x3_FF0B. The BDM uses these registers which are readable anytime by

the BDM. However, these registers are not readable by user programs.

When BDM is activated while CPU executes code overlapping with BDM firmware space the saved program counter (PC) will be

auto incremented by one from the BDM firmware, no matter what caused the entry into BDM active mode (BGND instruction,

BACKGROUND command or breakpoints). In such a case the PC must be set to the next valid address via a WRITE_PC

command before executing the GO command.

MM912F634CV2AP Datasheet(PDF) 198 Page - Freescale Semiconductor, Inc

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