ELANSC520 datasheet(34/440 Pages) AMD

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System Address Mapping Registers

2-2

Élan™SC520 Microcontroller Register Set Manual

Address Decode Control (ADDDECCTL)

Memory-Mapped

MMCR Offset 80h

This register controls miscellaneous functions in the ÉlanSC520 microcontroller address decode block.

Bit Definitions

Bit

WPV_INT_

ENB

Reserved

IO_HOLE_

DEST

Reserved

RTC_DIS

UART2_DIS UART1_DIS

Reset

00000000

R/W

RSV

R/W

RSV

R/W

Bit

Name

Function

WPV_INT_

ENB

Write-Protect Violation Interrupt Enable

This bit enables an interrupt request to be generated when a write-protect violation occurs.

0 = Write-protect violations do not generate an interrupt request to the CPU.

1 = Write-protect violations generate an interrupt request to the CPU.

Before the WPV_INT_ENB bit is set, the WPVMAP register (see page 12-21) must be

configured to route the interrupt to the appropriate interrupt request level and priority.

The initiator of the access that caused the write-protect violation can be the Am5x86 CPU, any

PCI bus master, or the GP bus DMA controller. This interrupt can only be generated if at least

one of the PARx register windows is enabled and has the write-protect attribute selected (see

page 2-6).

6-5

Reserved

This bit field should be written to 0 for normal system operation.

4IO_HOLE_

DEST

I/O Hole Access Destination

This bit determines the destination of accesses performed by the Am5x86 CPU to certain I/O

addresses in the range 0000h to 03FFh.

0 = The accesses are forwarded to the external GP bus (default).

1 = The accesses are forwarded to the PCI bus I/O space.

I/O addresses in the range 0000h to 03FFh that are not occupied by the internal GP bus

peripherals are normally reserved for PC/AT-compatible peripherals. Such addresses are

referred to as

holes in the I/O address space. See the memory and I/O chapter of the

Élan™SC520 Microcontroller User’s Manual, order #22004, for details about these holes.

If a PARx register (see page 2-6) is configured to address GP bus I/O space within a hole,

accesses in the defined region are forwarded to the GP bus regardless of the

IO_HOLE_DEST bit value. The PARx window must not overlap any of the internal peripherals’

direct-mapped I/O addresses.

Reserved

This bit field should be written to 0 for normal system operation.

ELANSC520 Datasheet(PDF) 34 Page - Advanced Micro Devices

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