ELANSC520 datasheet(41/440 Pages) AMD

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System Address Mapping Registers

Élan™SC520 Microcontroller Register Set Manual

2-9

Configuration Base Address (CBAR)

Direct-Mapped

I/O Address FFFCh

This register can be used to alias the memory-mapped configuration region (MMCR) that is used to access many

of the ÉlanSC520 microcontroller’s integrated peripheral functions. The MMCR is always accessible at

FFFEF000–

FFFEFFFFh, in the region directly below the boot ROM space, but it can also be aliased to any 4-Kbyte boundary

within the first 1 Gbyte of memory space.

Bit Definitions

Bit

ENABLE

Reserved

ADR[29

–24]

Reset

00000000

R/W

R/W!

RSV

R/W

Bit

ADR[23

–16]

Reset

00000000

R/W

Bit

ADR[15

–12]

Reserved

Reset

00000000

R/W

RSV

Bit

MATCH[7–0]

Reset

00000000

R/W

Bit

Name

Function

ENABLE

Enable

This bit must be set to enable write access to the CBAR register. Upon reading, the ENABLE

bit returns the state of the MMCR alias.

0 = MMCR alias is disabled.

1 = MMCR alias is enabled.

Writes to this bit are ignored if the value CBh is not written to the MATCH bit field in the same

write cycle.

Reserved

This bit field should be written to 0 for normal system operation.

–12

ADR[29

–12]

Start Address

This bit field defines the starting address of the memory-mapped configuration region on a

4-Kbyte boundary. The address programmed in this bit field is compared to internal Am5x86

CPU bus signals a29

–a12.

Writes to this bit field are ignored unless the ENABLE bit set and the value CBh is written to

the MATCH bit field in the same write cycle. Both of these conditions are required for the write

to take effect.

ELANSC520 Datasheet(PDF) 41 Page - Advanced Micro Devices

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