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ELANSC520 Datasheet(PDF) 75 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 75 Page - Advanced Micro Devices |
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75 / 440 page ![]() PCI Bus Host Bridge Registers Élan™SC520 Microcontroller Register Set Manual 6-11 For a host bridge NMI to propagate to the CPU, host bridge NMIs must be enabled via the PCI_NMI_ENB bit in the PCIHOSTMAP register (see page 12-17), and NMIs must be enabled via the NMI_ENB bit in the PICICR register (see page 12-4). Before host bridge interrupts are enabled, the PCIHOSTMAP register (see page 12-17) must be configured to route the interrupt to the appropriate interrupt request level and priority. The interrupt enabled via the GNT_TO_INT_ENB bit in the SYSARBCTL register (see page 5-2) shares the interrupt controller input used by host bridge interrupts. |
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