ELANSC520 datasheet(36/440 Pages) AMD

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System Address Mapping Registers

2-4

Élan™SC520 Microcontroller Register Set Manual

Write-Protect Violation Status (WPVSTA)

Memory-Mapped

MMCR Offset 82h

This register provides write-protect violation status for the ÉlanSC520 microcontroller’s address decode block.

Bit Definitions

Programming Notes

Bit

WPV_STA

Reserved

WPV_MSTR[1–0]

Reset

00000000

R/W

R/W!

RSV

Bit

Reserved

WPV_WINDOW[3–0]

Reset

00000000

R/W

RSV

Bit

Name

Function

WPV_STA

Write-Protect Violation Interrupt Status

This bit indicates whether an interrupt request is pending due to a write-protect violation.

0 = Write-protect violations interrupt request not pending.

1 = Write-protect violations interrupt request pending.

Software must write a 1 to this bit to clear the interrupt (and the status bit) before the hardware

can latch subsequent write-protect violations.

This bit provides the status of the interrupt regardless of the setting of the WPV_INT_ENB bit

in the ADDDECCTL register (see page 2-2).

–10

Reserved

This bit field should be written to 0 for normal system operation.

–8

WPV_MSTR

[1–0]

Write-Protect Violation Master

This bit field identifies the master that caused the write-protect violation.

00 = The Am5x86 CPU caused the violation.

01 = A PCI bus master caused the violation.

10 = The GP bus DMA controller caused the violation.

11 = Reserved.

This bit field contains valid information only while the WPV_STA bit is set. The master’s

identity is latched when a write-protect violation occurs. Subsequent write-protect violations

are not captured until software clears the interrupt by writing a 1 to the WPV_STA bit.

–4

Reserved

This bit field should be written to 0 for normal system operation.

–0

WPV_WINDOW

[3–0]

Write-Protect Violation Window Number

This bit field identifies the programmable address region window (PAR0–PAR15) in which the

write-protect violation occurred. This bit field contains valid information only while the

WPV_STA bit is set. The PARx window number is latched when a write-protect violation

occurs. Subsequent write-protect violations are not captured until software clears the interrupt

by writing a 1 to the WPV_STA bit.

ELANSC520 Datasheet(PDF) 36 Page - Advanced Micro Devices

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