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ELANSC520 Datasheet(PDF) 57 Page - Advanced Micro Devices |
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ELANSC520 Datasheet(HTML) 57 Page - Advanced Micro Devices |
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57 / 440 page  Élan™SC520 Microcontroller Register Set Manual 5-1 CHAPTER 5 SYSTEM ARBITRATION REGISTERS 5.1 OVERVIEW This chapter describes the system arbiter registers of the ÉlanSC520 microcontroller. The ÉlanSC520 microcontroller’s system arbiter controls access to the PCI bus and the internal CPU bus. The system arbiter register set consists of four memory-mapped configuration region (MMCR) registers that provide control and status functions. See the Élan™SC520 Microcontroller User’s Manual, order #22004, for details about the system arbiter. Table 5-1 lists the system arbiter registers in offset order, with the corresponding description’s page number. 5.2 REGISTERS Table 5-1 System Arbiter MMCR Registers Register Name Mnemonic MMCR Offset Page Number System Arbiter Control SYSARBCTL 70h page 5-2 PCI Bus Arbiter Status PCIARBSTA 71h page 5-3 System Arbiter Master Enable SYSARBMENB 72h page 5-4 Arbiter Priority Control ARBPRICTL 74h page 5-6 |
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