ELANSC520 datasheet(86/440 Pages) AMD

86 / 440 page

PCI Bus Host Bridge Registers

6-22

Élan™SC520 Microcontroller Register Set Manual

Class Code/Revision ID (PCICCREVID)

I/O Address 0CF8h/0CFCh

PCI Index 08h

This register contains the PCI configuration header space class code, program interface and revision identification.

Bit Definitions

Programming Notes

This register (PCICCREVID) is register number 2 in the host bridge-specific PCI configuration space.

Bit

CL_CD[7

–0]

Reset

00000110

R/W

Bit

SBCL_CD[7

–0]

Reset

00000000

R/W

Bit

PRG_IF[7

–0]

Reset

00000000

R/W

Bit

REV_ID[7

–0]

Reset

00000000

R/W

Bit

Name

Function

–24

CL_CD[7

–0]

Base Class Code

This bit field defines the PCI bus base class code of the host bridge.

06h = Bridge Device

–16

SBCL_CD

–0]

Sub Class Code

This bit field defines the PCI bus sub-class code for the host bridge.

00h = Host-PCI bridge

–8PRG_IF[7–0]

Program Interface

This bit field defines the PCI bus program interface type of the host bridge.

00h = Host-PCI bridge

–0

REV_ID[7

–0]

Revision I.D.

This bit field defines the host bridge revision number.

00h = Revision number

ELANSC520 Datasheet(PDF) 86 Page - Advanced Micro Devices

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