ELANSC520 datasheet(63/440 Pages) AMD

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System Arbitration Registers

Élan™SC520 Microcontroller Register Set Manual

5-7

Programming Notes

11–8

HI_PRI_1_SEL

[3–0]

PCI Bus Arbiter High Priority 1

This bit defines which PCI master is in position 1 of the high-priority queue.

0000 = PCI master connected to REQ0 and GNT0 is in position 1 of the high-priority queue.

0001 = PCI master connected to REQ1 and GNT1 is in position 1 of the high-priority queue.

0010 = PCI master connected to REQ2 and GNT2 is in position 1 of the high-priority queue.

0011 = PCI master connected to REQ3 and GNT3 is in position 1 of the high-priority queue.

0100 = PCI master connected to REQ4 and GNT4 is in position 1 of the high-priority queue.

0101–1110 = Reserved.

1111 = No master is in position 1 of the high-priority queue.

7–4

Reserved

This bit field should be written to 0 for normal system operation.

3–0

HI_PRI_0_SEL

[3–0]

PCI Bus Arbiter High Priority 0

This bit defines which PCI master is in position 0 of the high-priority queue.

0000 = PCI master connected to REQ0 and GNT0 is in position 0 of the high-priority queue.

0001 = PCI master connected to REQ1 and GNT1 is in position 0 of the high-priority queue.

0010 = PCI master connected to REQ2 and GNT2 is in position 0 of the high-priority queue.

0011 = PCI master connected to REQ3 and GNT3 is in position 0 of the high-priority queue.

0100 = PCI master connected to REQ4 and GNT4 is in position 0 of the high-priority queue.

0101–1110 = Reserved.

1111 = No master is in position 0 of the high-priority queue.

Bit

Name

Function

ELANSC520 Datasheet(PDF) 63 Page - Advanced Micro Devices